1. Field of the Invention
The present invention relates to a method of fabricating a multilayer structure of dielectric films, such as oxide/nitride/oxide or oxide/nitride/oxide /nitride.
2. Description of the Related Art
In recent years, the sizes of the MOSFETs and capacitors have become continuously smaller so that the packing densities of these ICs have increased considerably. Along with the large shrinkage of ICs"" critical dimention, the thickness of dielectric films is also largely reduced. The commen used dielectric film is oxide. Along with the reduce of oxide thickness, the resistivity strength is not large enough for device operation. As a result, some multilayer structures of dielectric films were disclosed to enhance the resistivity strength, such as oxide/nitride/oxide or oxide/nitride/oxide/nitride. The multilayer structure of dielectric films could be applied for manufacturing the dielectric layer between the floating gate and control gate of E2PROM and flash memories. It could also be applied for the dielectric layer between the top electrode and bottom electrode of a capacitor.
In accordance with the prior art, the multilayer structures such as ONO or ONON were formed by the method of low-pressure chemical vapor deposition (LPCVD) at different chambers for each film. Referring now to FIG. 1, a process flow for ONO structure manufacture is shown. For each oxide or nitride deposition, it is necessary to perform the following steps: (1) temperature elevation, (2) film deposition, and (3) annealing and then cooling. In addition, it is necessary to load and unload the substrate to/from different chambers for each film. According to FIG. 1, the steps for film deposition are only Step 2, 5, and 8, and it takes only 0.5 to 1 hour. However, the whole procedure spends 3 to 4 hours for ONO manufacture, because it is very time wasting to heat and cool the chambers such as Step 1, 3, 4, 6, 7, and 9. Therefore, if a process flow could eliminate some steps for heating and cooling, the throughput could thus be largely enhanced. In addition, it is not necessary to load and unload the substrate for each layer, during the processes of forming the multilayer structure of dielectric films. Therefore, metal and organic contamination would not occur during the process. Moreover, the wafer crack due to heating and cooling process would not also occur.
As mentioned above, the present invention provides a new method for manufacturing a multilayer structure of dielectric films. The film performance is as well as that in the prior art. Moreover, the time wasting issue in the prior art is overcome.
According, it is a primary object of the present invention to provide a method of fabricating a multilayer structure of dielectric films with the advantages of high throughput.
It is another object of the present invention to provide a method of fabricating a multilayer structure of dielectric films with the advantages of low cost.
It is also another object of the present invention to provide a method of fabricating a multilayer structure of dielectric films with the advantages of low contamination.
These objects are accomplished by the fabrication process described below. Firstly, a substrate with a source/drain structure is provided. A thermal oxidation is then performed to form a tunneling oxide. Thereafter, a film of polysilicon or amorphous silicon is formed, and then a floating gate is defined by using a series of processes of photolithography and etching. After that, a multilayer structure of dielectric films could be formed during only one heating and cooling step. The process flow shows as follows: 1. loading the substrate into a chamber and then heating the substrate; 2. an oxide layer, a nitride layer, and an oxide layer are formed in sequence by using LPCVD; the reactants of the LPCVD process for oxide are N2O and SiH2Cl2; the reactants of the LPCVD process for nitride are NH3 and SiH2Cl2; 3. cooling the chamber and then unloading the substrate. Between each deposition process, N2 gas is used for purging the chamber. The multilayer structure of dielectric films could be defined by using the conventional method of photolithography and etching. Finally, a control gate is formed on the multilayer structure of dielectric films, and the gate structure of a flash memory is then finished.